View SL6140NAMPTC_1310090.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

SL6140 SL6140
400MHz Wideband AGC Amplifier
DS2159
ISSUE 5.0
July 1999
Features
* * * * * * 400MHz Bandwidth (RL=50) High voltage Gain 45dB (R L=1k) 70dB Gain Control Range High Output Level at Low Gain Surface Mount Plastic Package Low Cost
Ordering Information
SL6140/NA/MP Industrial temperature range miniature plastic package SL6140/NA/MPTC Tape and Reel
Applications
* * * RF/IF Amplifier High Gain Mixers Video Amplifiers
Description
The SL6140 is an integrated broadband AGC amplifier, designed on an advanced bipolar process. The amplifier provides over 15dB of linear gain into 50 at 400MHz. Gain control is also provided with over 70dB of dynamic range. The SL6140 offers over 45dB of voltage gain with an RL of 1k.
The SL6140 (Figure 3) is a high gain amplifier with an AGC control capable of reducing the gain of the amplifier by over 70dB. The gain is adjustable by applying a voltage to the AGC input via an external resistor (RAGC), the value of which adjusts the curve of gain reduction versus control voltage (see Figure 4). As the output stage of the amplifier is an open collector the maximum voltage gain is determined by RL. With load resistance of 1k the single ended voltage gain is 45dB and with a load resistance of 50 the voltage gain is 15dB (20log10 VOUT/VIN ). Another parameter that depends on the load resistance is the bandwidth: 25MHz for RL = 1k, as compared with 400MHz for RL = 50. RL is chosen to give either the required bandwidth or voltage gain for the circuit. Figure 7 through to 10 show the typical S parameters for the device. Figures 11 and 12 show the typical variation in 3rd order intercept performance with AGC. In any application, the substrate should be connected to the most negative point in the circuit, usually to the same point as pin 3.
+VCC 1.0 F +VCC
2 RL 10n RAGC AGC INPUT 10n INPUT 6 5 8 RL 10n OUTPUT
SL6140
4 1 10n OUTPUT
3
7
Figure 1 - Typical Application
1
SL6140
OUTPUT +VCC GROUND INPUT
1 2 3 4
8 7 6 5
OUTPUT GROUND INPUT AGC INPUT
MP8
Figure 2 - Pin Connections Diagram (top view)
Electrical Characteristics
Tamb = 25C, VCC = 12V +5%, VIN = 1mVRMS, Frequency = 6MHz, Load (RL) = 10KOHms, RAGC = 22KOHm These characteristics are guaranteed over the following conditions (unless otherwise stated)
Characteristic Supply current Output stage current Pin 5,6,7 5,6 (sum) 5,6 5 Value Min Typ 19 7 Max 23 9 Units mA mA Conditions No input signal No input signal
Output current matching (magnitude of difference of output currents) AGC range
1.0
mA
2
60
75
dB
See Figure 4 & Note 1 (VAGC = 0V to 10V) RL = 1k See Figure 5 & Note 1 Tuned input and output RL = 50 RL = 1k See Figure 5 RL = 50
Voltage gain (single ended)
5,6 5,6
40
45 55 15 25 400
dB dB dB MHz
Bandwidth (-3dB)
5,6
Maximum output level (single ended) 0dB AGC -30dB AGC Noise figure Note. 1 Guaranteed but not tested.
5,6 5,6 5,6
3.5 3.5 5
V p-p V p-p dB
Note 1 RL = 1k. Note 1 Test CCT Figure 13
Absolute Maximum Ratings
Supply voltage, VCC Input voltage (differential) AGC supply Storage temperature Operating temperature range SL6140 MP Chip operating temperature SL6140 MP +18V +5V VCC -55C to +150C -40C to +85C at 200mW +150C
Thermal Resistance
Chip-to-ambient SL6140 MP Chip-to-case SL6140 MP 163C/W 57C/W
2
SL6140
2 VCC
470 X2
180
AGC I/P
5
70 8 180 7k 12.1k OUTPUT
470
470
1
OUTPUT
2k
4 INPUT
1.4k
45
6 INPUT
66 2.8k 200 200 2.8k
5k
5k
5.6k 1.1k 1.1k 2.1k
1.9k 200
7 3
SUBSTRATE
GROUND
Figure 3 - Full Circuit Diagram of SL6140
3
SL6140
G A I N R E D U C T I O N (dB)
0 10 20 30 40
RAGC=5.6k RAGC=22k
50 60 70
0
1
2
3
4
5
6
7
8
9
10
AGC VOLTAGE
Figure 4 - Gain Reduction v. AGC Voltage
8
D I F F E R E N T I A L O U T P U T (V p-p)
7
6
5
4
1MHzSINEWAVE
3
2
1
0 0 10 20 30 40 50
GAIN REDUCTION (dB)
Figure 5 - Max Differential O/P Voltage v. Gain Reduction
4
SL6140
50
RL=1k
40
dB
30
G A I N
20
RL=50
10
0
0.1
10
100
1000
FREQUENCY (MHz)
Figure 6 - Voltage Gain v. Frequency
Figure 7 - Input Impedance 50 System
5
SL6140
Figure 8 - Output Impedance 50 System
Figure 9 - Reverse Transmission Coefficient S12 SL6140
6
SL6140
Figure 10 - Forward Transmission Coefficient S12 SL6140
Figure 11 3rd Order Intercept Point Against Gain Reduction At 250.0MHz and 254.0MHz
7
SL6140
Figure 12 - 3rd Order Intercept Point Against Gain Reduction At 100.0MHz and 104.0MHz
+12V
1nF
6 2 1 L1 5 8 7 4 1nF 3 L2 O/P
VARIABLE CAPS 3-25pF L1 7 TURNS # 18 SWG L2 6 TURNS # 16 SWG
8mm DIA 16mm LONG 14mm DIA 19mm LONG
Figure 13 - 50MHz Noise Figure Test Circuit
8
For more information about all Zarlink products visit our Web Site at
www.zarlink.com
Information relating to products and services furnished herein by Zarlink Semiconductor Inc. trading as Zarlink Semiconductor or its subsidiaries (collectively "Zarlink") is believed to be reliable. However, Zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or use. Neither the supply of such information or purchase of product or service conveys any license, either express or implied, under patents or other intellectual property rights owned by Zarlink or licensed from third parties by Zarlink, whatsoever. Purchasers of products are also hereby notified that the use of product in certain ways or in combination with Zarlink, or non-Zarlink furnished goods or services may infringe patents or other intellectual property rights owned by Zarlink.
This publication is issued to provide information only and (unless agreed by Zarlink in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. The products, their specifications, services and other information appearing in this publication are subject to change by Zarlink without notice. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user's responsibility to fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. Manufacturing does not necessarily include testing of all functions or parameters. These products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. All products and materials are sold and services provided subject to Zarlink's conditions of sale which are available on request.
Purchase of Zarlink's I2C components conveys a licence under the Philips I2C Patent rights to use these components in an I2C System, provided that the system conforms to the I2C Standard Specification as defined by Philips. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright 2003, Zarlink Semiconductor Inc. All Rights Reserved.
TECHNICAL DOCUMENTATION - NOT FOR RESALE

▲Up To Search▲

Price & Availability of SL6140NAMPTC

	To Download SL6140NAMPTC Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .